There are many different ways an electronic circuit can fail, ranging from failed or missing devices to bad solder connections. There are also lots of different ways of testing them to find these failures, from ICT systems to boundary scan. Different test systems tend to be good at detecting different types of failure, so if you want to maximise your test coverage then you’ll want to use multiple systems to ensure no faults slip through. The challenge comes in comparing very different systems, seeing how much coverage they offer and more importantly, seeing how well they complement each other. Adding additional tests won’t help if they only test things that you’re already covering.

PCOLA/SOQ was developed as a way to score test systems and to see how well they work together. Each letter of PCOLA/SOQ stands for a type of potential fault and the total score tells you how many of these potential faults across the board would be detected by the test or tests you’re using.

PCOLA refers to the device and how it has been placed:

• Presence – is there a device where there should be one?

• Correctness – is that device the one it is supposed to be?

• Orientation – is the device fitted the correct way around?

• Live – does the device have basic functionality?

• Alignment – is the device placed straight and correctly centred on its pads?

And SOQ looks at the solder joints on the pins:

• Shorts – is there a possibility that a connection could be accidentally joined to another?

• Opens – could a connection have been missed?

• Quality – are all joints well formed, with enough material to correctly hold?

For any given test, a score is assigned for each letter of PCOLA (for devices) or SOQ (for pins). These can be 0 for no coverage, 0.5 for partial coverage or 1 for full coverage. These scores are totalled separately across the entire circuit for PCOLA and SOQ and then scaled to give test coverage as a score out of 100,000.

If multiple types of test are run on a circuit, you don’t simply add the individual scores together, but a combined score can be calculated, which will typically be significantly higher than any of the individual ones.

The system also supports assigning different weightings to different checks, perhaps you think shorts and opens are more important (and therefore should be more highly weighted) than joint quality, or maybe you think alignment is less important than presence.

A simple example

Let’s consider boundary scan first, since obviously that’s our favourite at XJTAG! Let’s consider a device like an EEPROM with full access to all pins.

Boundary scan can tell you if a device like this exists, so it gets a score of 1 on Presence. Correctness is a bit more complicated and so will vary depending on the device in question – it can’t tell the difference between a 50 Ohm and 100 Ohm resistor for example, but it can read a part number from a flash – in this case, it gets a score of 0.5 because it can verify that the device is an EEPROM, but not confirm the part number. Orientation will depend on the device as well, but since boundary scan verifies functionality, a pass here means that we can be pretty sure it’s the right way round. Live is where boundary scan shines, it’s testing the device itself, so clearly has coverage there. Alignment is a limitation though; if the device is sufficiently on the pads to make contact, we can’t tell whether it’s perfectly centred, or right on the edge, so that would be a 0.

SOQ works similarly; boundary scan is great at finding shorts and opens, so 1s there, but if the joint is poor quality, perhaps a bit dry and may fail in the future, there’s no indication in the electrical tests.

From these numbers, we can make a summary and remember, these scores will vary depending on the component and a full PCOLA/SOQ calculation accounts for this across the entire circuit, but for our example, the device scores:

And each pin scores:

This is a total score of 70,000 and 66,667 – these scores are a bit silly to quote for a single device, but become more useful when totalled up and averaged over a full circuit.

Now let’s consider adding some automated optical inspection to our test regime. A suitably high resolution photo will allow the system to detect the presence of a device easily, and also the correctness because it can read a part number or code from it. It can also check orientation because it can see if the device has been rotated. It can’t tell if the device is live though, there’s no electrical testing, but it can check the alignment. Some shorts may be visible, perhaps because there’s a large blob of solder joining two pins together, but they certainly can’t be relied on. Opens will almost certainly be missed as well, however visual inspection can tell you a decent amount about the quality of a joint, so we’ll get some credit here. Of course, this only applies if the solder joints are visible – for a resistor, this is fine, but for a BGA, we’d get a zero here because the joints are hidden.

Once again, for our EEPROM example:

Here we have a total score of 80,000 and 33,333.

The interesting part comes when we combine the two. Obviously adding the scores together would be inappropriate – the PCOLA score would be over 100,000 and therefore meaningless, but we can combine them by taking the larger number for each letter and creating an overall score:

Now we have a combined score of 100,000 and 83,333 – a much better result than either system could have given on its own.

What does it look like in the real world?

XJDeveloper can display the PCOLA/SOQ scores for its projects, by default only including the tests it performs itself, whether boundary scan, functional or through integration with an ICT system, but you can also add in additional PCOLA/SOQ entries for your other tests, perhaps to tell it about some AOI or X-Ray testing you’re doing outside XJDeveloper.

In this screenshot, we can see a real world example with the middle columns showing the weighting for each type of fault and the final two columns showing the actual scores for devices of those types, with the total score at the top. Here, we can see that there is an entry for “Passive devices (orientation irrelevant)” with an orientation weighting of zero. This covers things like resistors and non-electrolytic capacitors which can be placed either way round so the orientation doesn’t matter and isn’t tested for.

The Device Score refers to the PCOLA rating, and as you can see, active devices (JTAG, Logic and Test) score very well here; it’s easy for the testing to be really sure about them, however passive devices are more difficult, and are frequently on inaccessible nets.

Connection (SOQ) scores are also quite varied, largely limited by how many of those connections can be accessed by JTAG, directly or indirectly. Notably, despite not having any really high scores, the SOQ total is higher than the PCOLA total; this is because shorts coverage applies to the entire net, increasing the coverage even if some of the devices are not tested.

This is an excellent example of where AOI would complement boundary scan extremely well – it would dramatically improve the PCOLA score as boundary scan covers Live but not Alignment, AOI covers Alignment but not Live. AOI would also add some useful Quality checks for the SOQ score to complement boundary scan’s successes with Shorts and Opens.

In conclusion, testing is at its most effective when you use multiple types of test, particularly ones that work in very different ways. Combining AOI and X-ray improves coverage over either method alone, but would offer less than combining either of them with boundary scan. Combining boundary scan and ICT is worthwhile, however mostly as a way of extending the effective coverage of the boundary scan testing; it’s still largely testing for the same sort of faults.

If you’d like to learn more about boundary scan testing and how it can boost your PCOLA/SOQ scores, visit www.xjtag.com to find out more or start a free trial.

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