An LTE radio solution will probably have at its heart a system-on-chip (SoC) such as the Samsung Exynos or Qualcomm Snapdragon families. This is a key difference from the previous generations of mission-critical electronics where chips were less capable, more application-specific and the functionality only came together at PCB level. This makes quality control at the silicon stage more valuable than ever before.

Even before dicing wafers into individual chips and bonding, it is possible to contact the die test pads and identify issues. Finding faults early, especially at this stage, has two main advantages:

• The faults can be more easily diagnosed and root cause analysed, meaning changes can be made to avoid future failures

• Less value has been added to the product and so there is less cost involved in rework or disposal of bad parts

As well as establishing the performance of the silicon, both as a wafer, and after it is diced into individual chips, there is a whole range of testing carried out that will add value later. Verifying Memory Built-In Self Tests (BIST) and JTAG compliance at this stage are essential for the critical programming, debug and boundary scan testing stages which will come later.

Once a SoC is packaged by wire bonding or flip-chip the silicon has a connection to the outside world. In moving from the nanometre to the micron in terms of pin density a far wider range of testing can be done to root out latent faults long before the product reaches the field.

At this stage the chip manufacturer, or a silicon fab producing it under contact, will carry out a range of tests to ensure the chip will behave at the GHz speeds required using a precision test socket which can make contact with the pins in a controlled environment.

These tests include measuring the electrical characteristics of the packaged chip such as voltage thresholds, clock operation and pin continuity. Also, this is the first time that radio frequency behaviours can be tested – critical for the communications functionality these systems on chip have.

At this stage, if faults are found, it is very nearly impossible to make repairs and the value of the parts is still relatively low. This means that discarding rather than reworking faulty parts is normal practice here whether with the chip manufacturer or at inbound quality testing to the electronics manufacturer.

As we reach board level, the value added to the SoC at the heart of the design increases and so the importance of finding faults, even if they don’t occur all of the time (intermittent) or have not yet developed to the stage of causing a mission-critical failure (latent), grows.

Modern printed circuit board (PCB) technologies such as high-density interconnect (HDI), embedded components and blind vias allow more compact and higher speed electronics. However, they make test access ever harder, in the same way as SoCs do at the chip level.

In the world of mission-critical, it is more normal to produce the electronics in-house instead of using contract electronics manufacturers because of the security requirements and valuable intellectual property in the products. This means companies need to keep significant Design-For-Test (DFT) expertise in-house.

Fortunately, the functionality verified earlier now adds enormous value to the test regime. JTAG access, either through USB-enabled controllers like those made by FTDI, or brought out to a connector, allow:

• Testing and debugging of the chip firmware

• Downloading custom firmware to run functional tests on the board

• Boundary scan control to directly drive pins on the PCB to test connectivity and functionality of surrounding devices

As the product progresses through the manufacturing process a danger emerges in designing a balanced test regime. It is possible to test too much:

• Testing itself is often not representative of real-world use and can risk inducing faults itself. Worst-case test routines in embedded software may damage components through thermal stress and more testing always risks Electrostatic Discharge (ESD) damage.

• Spending more money and time on production testing that slows down the line, builds up the cost of Work-In-Progress (WIP) and costs more than the money that is saved through letting the failure happen later.

The testing done at this stage is the first time that subsystems emerge that can allow end-to-end testing of specific functionality as well as allowing the testing approaches to reflect how the device will actually be used.

This can involve, Human-Machine-Interface (HMI) such as keypads screens and buttons, batteries and battery management systems and the first communication to the outside world through radio frequency and LTE. The need to test all of this growing functionality leads to the risks of damage and overtesting mentioned above.

Once the product is fully assembled, the cost of finding and correcting a fault has risen exponentially from the first stages of making our mission-critical product (Software Engineering Economics – Barry W. Boehm).

Out there in the real world mission-critical products see harsh use and no software or electronics in the world is completely error free or 100% reliable.

The End-Of-Line (EOL) testing done now is, however, the last chance to catch faults before the product is used by the customer and so will be rigorous. Faults found now will require rework which, although costly, may be preferable to throwing away an assembled product.

Providing physical test access in the finished product introduces security weaknesses and so connections for diagnosis, repair and software updates will be limited. The ace-up-the-sleeve of this next generation of mission-critical communications products will be that LTE enables this to be done without a physical connection ensuring the security of the device.

This test access, which in previous generations needed products to go to a repair centre, will mean that mission-critical products can be maintained and brought back into action faster and more cheaply than before – even using the very same functional and boundary scan test solutions from back in the factory.